Arthur Lu
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8e6962ad4d
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combine PTY and CHK instruction,
recode remaining operands
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2022-08-20 01:23:00 -07:00 |
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Arthur Lu
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218445e20c
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remove ORR instruction
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2022-08-20 00:33:07 -07:00 |
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Arthur Lu
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f31ac21f65
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implement ADD and SUB using CLA
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2022-08-19 23:25:31 -07:00 |
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Arthur Lu
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434032f4ba
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fix control complexity
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2022-08-19 23:16:33 -07:00 |
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Arthur Lu
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17b1b5f923
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reduction of ALU complexity by removing INC and DEC
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2022-08-19 22:44:47 -07:00 |
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Arthur Lu
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ed6fd943a6
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implement control comb logic (untested)
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2022-08-13 17:37:13 -07:00 |
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Arthur Lu
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2f967bef04
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push last commit
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2022-08-13 16:36:00 -07:00 |
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Arthur Lu
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be156765f3
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populate better starting rtl code
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2022-08-13 15:34:01 -07:00 |
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Arthur Lu
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31b077c5f2
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add provided RTL models
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2022-08-11 22:01:28 -07:00 |
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