Arthur Lu
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218445e20c
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remove ORR instruction
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2022-08-20 00:33:07 -07:00 |
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Arthur Lu
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ca7bf9fc6e
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remove SUB instruction from ISA,
update program2 and program3,
update control logic,
update assembler
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2022-08-19 23:34:51 -07:00 |
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Arthur Lu
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434032f4ba
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fix control complexity
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2022-08-19 23:16:33 -07:00 |
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Arthur Lu
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17b1b5f923
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reduction of ALU complexity by removing INC and DEC
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2022-08-19 22:44:47 -07:00 |
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Arthur Lu
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c7b5b8b63c
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fix warning casez had no default
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2022-08-19 21:16:03 -07:00 |
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Arthur Lu
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ffa7e13954
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fix file headers
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2022-08-14 16:05:44 -07:00 |
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Arthur Lu
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935864ad9c
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fix bug in PC jump target calculation,
fix bug in RegFile input width,
fix control logic bug with INC/DEC,
change assembler output format,
change programs to use d0 as space char value
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2022-08-14 13:44:51 -07:00 |
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Arthur Lu
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0dbd5dbbea
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fixed bugs in synthesis
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2022-08-13 18:54:10 -07:00 |
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Arthur Lu
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98fbdc5546
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populate top_level.sv
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2022-08-13 18:06:19 -07:00 |
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Arthur Lu
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2839184903
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fix compile errors
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2022-08-13 17:38:45 -07:00 |
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Arthur Lu
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ed6fd943a6
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implement control comb logic (untested)
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2022-08-13 17:37:13 -07:00 |
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Arthur Lu
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be156765f3
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populate better starting rtl code
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2022-08-13 15:34:01 -07:00 |
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Arthur Lu
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31b077c5f2
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add provided RTL models
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2022-08-11 22:01:28 -07:00 |
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