fix compile errors
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2839184903
@ -69,8 +69,8 @@ module Ctrl #(
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write_mem = 'b1;
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end
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'b0_0011_0xxx: begin // NXT
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if(S_operand == 'd8 || S_operand == 'd9 || S_operand == d'10) ALU_OP = INC;
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else if (S_operand == 'd11 || S_operand == 'd12 || S_operand == d'13) ALU_OP = DEC;
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if(S_operand == 'd8 || S_operand == 'd9 || S_operand == 'd10) ALU_OP = INC;
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else if (S_operand == 'd11 || S_operand == 'd12 || S_operand == 'd13) ALU_OP = DEC;
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else ALU_OP = NOP;
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RaddrA = S_operand;
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Waddr = S_operand;
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@ -5,7 +5,7 @@
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module InstFetch #(parameter T=10, parameter W=8)( // T is PC address size, W is the jump target pointer width, which is less
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input logic Clk, Reset, // clock, reset
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input logic BranchEZ, BranchNZ, BranchAlways, Zero, // branch control signals zero from alu signals; brnahc signals will be one hot encoding
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input logic done // Done flag to indicate if the PC should increment at all
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input logic done, // Done flag to indicate if the PC should increment at all
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input logic [W-1:0] Target, // jump target pointer
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output logic [T-1:0] ProgCtr_p4 // value of pc+4 for use in JAL instruction itself
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);
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