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made top_level submodule naming more verbose

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This commit is contained in:
Arthur Lu 2022-08-13 18:15:45 -07:00
parent 98fbdc5546
commit 3c77111bfd
1 changed files with 5 additions and 5 deletions
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10
RTL/top_level.sv
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@ -27,9 +27,9 @@ module top_level(
logic Done_out; logic Done_out;
logic [T-1:0] ProgCtr; logic [T-1:0] ProgCtr;
Ctrl #() c (.*); Ctrl #() control (.*);
ALU #() a ( ALU #() alu (
.A(ALU_A), .A(ALU_A),
.B(ALU_B), .B(ALU_B),
.ALU_OP(ALU_OP), .ALU_OP(ALU_OP),
@ -50,7 +50,7 @@ module top_level(
.ProgCtr_p4(ProgCtr_p4) .ProgCtr_p4(ProgCtr_p4)
); );
RegFile #() r ( RegFile #() regfile (
.Clk(clk), .Clk(clk),
.Reset(init), .Reset(init),
.WriteEn(RegWrite), .WriteEn(RegWrite),
@ -67,7 +67,7 @@ module top_level(
.Done_out(Done_out) .Done_out(Done_out)
); );
DataMem #() d ( DataMem #() datamem (
.Clk(clk), .Clk(clk),
.Reset(init), .Reset(init),
.WriteEn(write_mem), .WriteEn(write_mem),
@ -76,7 +76,7 @@ module top_level(
.DataOut(mem_out) .DataOut(mem_out)
); );
InstROM #() i ( InstROM #() rom (
.InstAddress(ProgCtr), .InstAddress(ProgCtr),
.InstOut(Instruction) .InstOut(Instruction)
); );