4b909d48dd
change output of example assembler scripts, update testbenches for programs 1 2 3 to use overloadable parameter, formatted program3_tb
20 lines
554 B
Systemverilog
20 lines
554 B
Systemverilog
// Module Name: InstFetch
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// Project Name: CSE141L
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// Description: instruction ROM module for use with InstFetch
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module InstROM #(parameter A=10, W=9, machine_code_file = "machine_code.txt") (
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input logic [A-1:0] InstAddress,
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output logic[W-1:0] InstOut
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);
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// declare 2-dimensional array, W bits wide, 2**A words deep
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logic[W-1:0] inst_rom[2**A];
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assign InstOut = inst_rom[InstAddress];
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// use readmemb to read ascii 0 and 1 representation of binary values from text file
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initial begin
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$readmemb(machine_code_file,inst_rom);
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end
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endmodule
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