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remove ORR instruction

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This commit is contained in:
Arthur Lu 2022-08-20 00:33:07 -07:00
parent ca7bf9fc6e
commit 218445e20c
6 changed files with 5 additions and 10 deletions
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1
RTL/ALU.sv
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@ -35,7 +35,6 @@ module ALU #(parameter W=8)(
CIN = 'b1; CIN = 'b1;
Out = AdderResult[W-1:0]; Out = AdderResult[W-1:0];
end end
ORR: Out = A | B; // bitwise OR between A and B
AND: Out = A & B; // bitwise AND between A and B AND: Out = A & B; // bitwise AND between A and B
LSH: Out = B << A; // shift B by A bits (limitation of control) LSH: Out = B << A; // shift B by A bits (limitation of control)
RXOR_7: Out = ^(A[6:0]); // perform reduction XOR of lower 7 bits of A RXOR_7: Out = ^(A[6:0]); // perform reduction XOR of lower 7 bits of A

4
RTL/Ctrl.sv
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@ -90,10 +90,6 @@ module Ctrl #(
ALU_OP = ADD; ALU_OP = ADD;
RaddrA = A_operand; RaddrA = A_operand;
end end
'b0_0110_?: begin // ORR
ALU_OP = ORR;
RaddrA = A_operand;
end
'b0_0111_?: begin // AND 'b0_0111_?: begin // AND
ALU_OP = AND; ALU_OP = AND;
RaddrA = A_operand; RaddrA = A_operand;

4
firmware/assembler.py
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@ -35,7 +35,7 @@ op_type = {
'CLB': 'G', 'CLB': 'G',
'ADD': 'A', 'ADD': 'A',
#'SUB': 'A', #'SUB': 'A',
'ORR': 'A', #'ORR': 'A',
'AND': 'A', 'AND': 'A',
'LSH': 'T', 'LSH': 'T',
'PTY': 'G', 'PTY': 'G',
@ -58,7 +58,7 @@ op_codes = {
'CLB': 0b0_0011_1000, 'CLB': 0b0_0011_1000,
'ADD': 0b0_0100_0000, 'ADD': 0b0_0100_0000,
#'SUB': 0b0_0101_0000, #'SUB': 0b0_0101_0000,
'ORR': 0b0_0110_0000, #'ORR': 0b0_0110_0000,
'AND': 0b0_0111_0000, 'AND': 0b0_0111_0000,
'LSH': 0b0_1000_0000, 'LSH': 0b0_1000_0000,
'PTY': 0b0_1000_1000, 'PTY': 0b0_1000_1000,

2
firmware/program1.asm
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@ -56,7 +56,7 @@ lfsr_routine: GET r7 // get previous state
PUT r1 // store feedback bit to r1 temporarily PUT r1 // store feedback bit to r1 temporarily
GET r7 // get previous state again GET r7 // get previous state again
LSH #d1 // left shift previous state by 1 LSH #d1 // left shift previous state by 1
ORR r1 // or with parity bit to get next state XOR r1 // or with parity bit to get next state
PUT r7 // put next state to r7 PUT r7 // put next state to r7
GET r14 // load link register GET r14 // load link register
JMP r0 // return to function call address JMP r0 // return to function call address

2
firmware/program2.asm
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@ -98,7 +98,7 @@ lfsr_routine: GET r7 // get previous state
PUT r1 // store feedback bit to r1 temporarily PUT r1 // store feedback bit to r1 temporarily
GET r7 // get previous state again GET r7 // get previous state again
LSH #d1 // left shift previous state by 1 LSH #d1 // left shift previous state by 1
ORR r1 // or with parity bit to get next state XOR r1 // or with parity bit to get next state
PUT r7 // put next state to r7 PUT r7 // put next state to r7
GET r14 // load link register GET r14 // load link register
JMP r0 // return to function call address JMP r0 // return to function call address

2
firmware/program3.asm
View File

@ -139,7 +139,7 @@ lfsr_routine: GET r7 // get previous state
PUT r1 // store feedback bit to r1 temporarily PUT r1 // store feedback bit to r1 temporarily
GET r7 // get previous state again GET r7 // get previous state again
LSH #d1 // left shift previous state by 1 LSH #d1 // left shift previous state by 1
ORR r1 // or with parity bit to get next state XOR r1 // or with parity bit to get next state
PUT r7 // put next state to r7 PUT r7 // put next state to r7
GET r14 // load link register GET r14 // load link register
JMP r0 // return to function call address JMP r0 // return to function call address